Tutorials

  1. ALU design (lab)
  2. CPU design (lab)
  3. Assembly for MC68332 (lab)
  4. C programming:
    Servo control
    (lab)
  5. Sensors and LCD ouput (lab)
  6. DC motor control (lab)
  7. Position control of differential-drive (lab)
  8. PSD, electromagnet (lab)
  9. Camera interface (lab)
  10. Image processing (lab)
  11. Final project (lab)
  12. Review

Embedded Systems 620.220

MC68332 Machine Language

The machine language instructions for the CPU32 consist of one or more 16-bit words in memory. The first word is the operation word, which contains the operation code (op-code) as well as the size or length and the addressing modes for any operands, if necessary. For most instructions, the op-code is contained in bits 12 through 15 of the first word. The various combinations of these bits yield 16 op-codes shown in the table below.

Bits 15 - 12
Operation
0000
Bit Manipulation / MOVEP / Immediate
0001
Move Byte
0010
Move Long
0011
Move Word
0100
Miscellaneous
0101
ADDQ / SUBQ / Scc / DBcc / TRAPcc
0110
Bcc / BSR / BRA
0111
MOVEQ
1000
OR / DIV / SBCD
1001
SUB / SUBX
1010
(Unassigned, Reserved)
1011
CMP / EOR
1100
AND / MUL / ABCD / EXG
1101
ADD / ADDX
1110
Shift / Rotate / Bit Field
1111
Coprocessor Operation

An important difference betweeen the CPU designed for laboratories one and two and the CPU32 is that the programmer does use the op-codes to program the CPU. The op-codes are stored as microcode in the ROM of the CPU32 and a special program, called an assembler, converts code that the programmer writes (assembly instructions) to sequences of microcode.

Note: The information about the MC68332 was taken from 'The Motorola MC68332 Microcontroller - Product Design, Assembly Language Programming, and Interfacing' by Thomas L. Harman, 1991.

MC68332 Register Set

The MC68332 has the following general purpose registers:

  • Program counter - holds the address of next instruction to be fetched from memory.
  • Condition code register - contains bits that indicate the results of arithmetic or similar operations.
  • Eight (8) data registers
  • Seven (7) address registers

The following diagram, from the CPU32 data sheet, illustrates the arrangement of the registers.

 

MC68332 introduction   MC68332 assembly

Questions? Email Josh Petitt

last updated January 28, 2003 - © University of Western Australia